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Id – Vgs

by Dr. Rishi Todani & Dr. Ashis Kumar Mal

Plotting MOSFET Characteristic is usually the first experiment taken up by the students. Plotting the input and output characteristics of a MOSFET gives us a good practice of DC analysis associated with Cadence. Start by creating a new schematic cell view in you existing or newly created library. Creation of new library and cellview is already covered in “First Look at Cadence” page.

Schematic Creation

Create a new schematic cellview where we shall instantiate a NMOS and apply some Vgs and Vds and plot the drain currents at different operating points. In a new schematic editor window, press “i”. This will invoke a new subwindow called Add an instance window. Here we can select what we wish to add to the schematic.

We can browse for an instance called N_18_MM inside the UMC_18_CMOS library, and select the symbol view from the browser window. Now the NMOS is attached to our mouse cursor and we can place the NMOS by just clicking on an empty space on the schematic editor window. A window shown below will appear where can can change the W and L of the transistor and even rotate the transistor in all ways and direction by the Rotate, Sideways and Upside Down keys.

The device is still seen as attached to the mouse, which can be removed by pressing “ESC” key. After placing the transistor, the schematic would look something like this.

The top terminal of the NMOS is the drain, bottom one is the source (clear from the arrow), the terminal on the left is gate and on centre right is body. Now we have to add dc supply sources. One Vdc source for gate to source voltage and one for drain to source voltage. Again invoke add an instance menu by pressing i and browse for an instance called “vdc” inside analogLib. Note that analogLib can be sorted by categories by ticking the show category option at the top of the browser window. Vdc can be found under analogLib > Sources > Independent > Vdc. Draw the schematic as shown below. The wires can be drawn by pressing “w” then click on starting point, then click on ending point. NOTE that a gnd! instance has to be added to the schematic. Else the simulator will not be able to resolve the voltages as no reference would be specified then.

Now the value of the dc sources as to be set. Choose a dc source, and press “q”. This is open the query page. In the row DC Voltage, fill the values “vgs” and “vds” for the two voltage sources correctly. Note that no units are to be added. Cadence will automatically take it in voltage.

Also the W and L of the transistor can be changed at any time by selecting the transistor and pressing q. the query page “q” is generally used to set properties of all the components and devices invoked from the library manager.

Once the schematic is ready, press the “Check and Save” button on top left in the schematic editor window (tick symbol button). This will check for errors and save and will report if there are any errors or warnings. Errors cannot be ignored but warnings may be ignored if you are aware and sure that the warning is harmless. Now its time to simulate.

DC Analysis

Select Tools > Analog Environments. A new window opens up. On the menu on top, select variable > copy from cellview. Immediately, vgs and vds would appear on the low left side of this window. Double click them and assign some initial value, like vgs=0.5 V and vds=0.6 V.

from Menu, click Analysis > Choose. click on dc and click on save operating points. Also select component parameter below. this will make some more options appear. Click on select component twice. This will take you to schematic, click on a voltage source for vgs, then in new popup window select dc voltage and then OK. Come back to the analysis window by using ALT-TAB and give the start = 0 and stop 1.8V (Since maximum supply is 1.8V for our process). Then press OK on analysis window.

Coming back to the Analog Environments, select output > to be plotted > select on schematic. Now select the drain terminal of the NMOS transistor by clicking on it. then press Esc. The Final analysis window will look like shown below.

Come back to Analog Environment and notice that the output is added and select Simulation > Netlist and Run or just press the Netlist and Run button on the right (third button from down). Now simulation will start and a plot window will appear as shown below.

The X-axis is Vgs and the Y-Axis is Id. The Id Vgs curve shown above is for the specified value of vds (specified to variable vds in analog environment window).

Parametric Analysis

We can also plot Id Vgs characteristics for more than one value of Vds on the same graph at the same time. Such plots can be achieved by parametric analysis. Let us consider that we wish to plot the below given graph.

We have Vgs on the X Axis and Id on the Y Axis. Each curve on the plot is for different values of Vds. Therefore we select vgs as the sweep variable in dc analysis and vds as the variable of parametric analysis.

Just like earlier, from analog environment, we select vgs voltage source in component parameter sweep in DC Analysis. Sweep it from 0 to 1.8V. Select the drain terminal of the transistor as the current plot. Then from Analog Environment window, we select Tools > Parametric. This will open up a new window as shown below.

..

we fill up the above window as shown. Note that the variable name “vds” is same as the variable name given to the dc voltage value of the voltage source which applies the vds of the transistor. To eliminate variable name errors, in this window, choose Setup > Variable name > sweep 1. Then select vds as the parametric sweep variable. Give in the range and the number of steps as shown above. then click Analysis > Start. Simulation will run, and the above shown graph for Id Vs. Vgs for various vds will be plotted.